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INTEGRATED CIRCUITS
DATA SHEET
SAA5252 Line twenty-one acquisition and display (LITOD)
Product specification Supersedes data of March 1995 File under Integrated Circuits, IC02 1996 Jul 18
Philips Semiconductors
Product specification
Line twenty-one acquisition and display (LITOD)
FEATURES * Complete `stand-alone' Line 21 decoder in one package * On-chip display RAM allowing full page Text mode * Enhanced character display modes * Full colour captions * RGB interface for standard colour decoder ICs * Automatic handling of Field 2 data * Automatic selection of (1H, 1V), (2H, 1V) or (2H, 2V) scan modes * Onboard OSD facility using Character generator * RGB inputs to support existing OSD ICs * I2C-bus or `stand-alone' pin control * Automatic data-ready signal generation on data acquisition * Can decode signals recorded on standard VHS and S-VHS tape. QUICK REFERENCE DATA SYMBOL VDD IDD Vsyn Vvid Tamb Tstg supply voltage supply current CVBS sync amplitude CVBS video amplitude operating ambient temperature storage temperature PARAMETER - 0.1 0.7 -20 -55 MIN. 4.5 30 0.3 1.0 - - TYP. 5.0 - 0.6 1.4 +70 +125 GENERAL DESCRIPTION
SAA5252
The SAA5252 (LITOD) is a single-chip CMOS device, which will acquire, decode and display Line 21 Closed Captioning data from a 525-line composite video signal. Operation as an On-Screen Display (OSD) device is also possible. Normal and line progressive scan modes are supported.
MAX. 5.5 V
UNIT mA V V C C
ORDERING INFORMATION TYPE NUMBER SAA5252P SAA5252T PACKAGE NAME DIP24 SO24 DESCRIPTION plastic dual in-line package; 24 leads (600 mil) plastic small outline package; 24 leads; body width 7.5 mm VERSION SOT101-1 SOT137-1
1996 Jul 18
2
Philips Semiconductors
Product specification
Line twenty-one acquisition and display (LITOD)
BLOCK DIAGRAM
SAA5252
VSS 19
V DD 18
V 7 DISPLAY TIMING
H 8
i.c. 6 17 16 CHARACTER GENERATOR 15 ROUNDING ITALICS AND RGB MULTIPLEXOR 14 13 9 10 11 PAGE RAM 12 5 RGBREF BLAN R G B BLANIN RIN GIN BIN DR SDA SCL
OSCIN
21
OSCGND
22
OSCILLATOR
CHARACTER ROM ADDRESSING CODE INTERPRETER AND ADDRESSING
OSCOUT
20
SAA5252
BLACK IREF
23 24
SYNC SEPARATOR AND ACQUISITION TIMING SERIAL/ PARALLEL AND PARITY
I2C INTERFACE
3 4
CVBS
1
ADC
DATA DETECTOR
CONTROL 2 I 2 C/DC
MBB623 - 1
Fig.1 Block diagram.
1996 Jul 18
3
Philips Semiconductors
Product specification
Line twenty-one acquisition and display (LITOD)
PINNING SYMBOL CVBS I2C/DC SDA SCL DR i.c. V H BLANIN RIN GIN BIN B G R BLAN RGBREF VDD VSS OSCOUT OSCIN OSCGND BLACK IREF PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 DESCRIPTION composite video input; signal should be connected via a 100 nF capacitor input selects I2C or Direct Control serial data port for I2C-bus or mode select input for direct control serial clock input for I2C-bus or mode select input for direct control data-ready signal to microcontroller (active-LOW) or mode select input for direct control internally connected; connect to VSS for normal operation vertical reference input for display timing horizontal reference input for display timing video blanking input from external OSD device RED video input from external OSD device GREEN video input from external OSD device BLUE video input from external OSD device BLUE video output GREEN video output RED video output video blanking output input voltage defining output HIGH level for RGB pins for closed captioning output +5 V supply 0 V ground oscillator output oscillator input oscillator ground video black level storage input; connected to VSS via 100 nF capacitor reference current input; connected to VSS via 27 k resistor
CVBS I 2 C/DC SDA SCL DR i.c. V H BLANIN 1 2 3 4 5 6
SAA5252
24 IREF 23 BLACK 22 OSCGND 21 OSCIN 20 OSCOUT 19 SAA5252 18 VSS V DD
7 8 9
17 RGBREF 16 BLAN 15 R
RIN 10 GIN 11 BIN 12
MBB622 - 1
14 G 13 B
Fig.2 Pin configuration.
1996 Jul 18
4
Philips Semiconductors
Product specification
Line twenty-one acquisition and display (LITOD)
LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL VDD VImax VOmax Vdif IIOK IOmax Tamb Tstg Ves PARAMETER supply voltage (all supplies) maximum input voltage (any input) maximum output voltage (any output) difference between VSS and OSCGND DC input or output diode current maximum output current (each output) operating ambient temperature storage temperature electrostatic handling human body model machine model Notes 1. This maximum value has an absolute maximum of 6.5 V independent of VDD. note 2 note 3 -2000 -200 note 1 note 1 CONDITIONS MIN. -0.3 -0.3 - - - - -20 -55
SAA5252
MAX. +6.5 V VDD + 0.5 V VDD + 0.5 V 0.25 20 10 +70 +125 +2000 +200 V
UNIT
mA mA C C V V
2. The human body model ESD simulation is equivalent to discharging a 100 pF capacitor via a 1.5 k resistor, which produces a single discharge transient. Reference "Philips Semiconductors Test Method UZW-BO/FQ-A302 (similar to MIL-STD 883C method 3015.7)". 3. The machine model ESD simulation is equivalent to discharging a 200 pF capacitor via a resistor and series inductor with effective dynamic values of 25 and 2.5 H, which produces a damped oscillating discharge. Reference "Philips Semiconductors Test Method UZW-BO/FQ-B302 (similar to EIAJ IC-121 Test Method 20 condition C)". Quality This device will meet the requirements of the "Philips Semiconductors General Quality Specification UZW-BO/FQ-0601" in accordance with "Quality Reference Handbook (order number 9397 750 00192)". This details the acceptance criteria for all Q & R tests applied to the product.
1996 Jul 18
5
Philips Semiconductors
Product specification
Line twenty-one acquisition and display (LITOD)
CHARACTERISTICS VDD = 5 to 5.5 V; VSS = 0 V; Tamb = -20 to +70 C; unless otherwise specified. SYMBOL Supplies VDD IDDtot Inputs CVBS (PIN 1) Vsyn Vvid(p-p) Vdat Zsource VI ZI CI R24 V24 H (PIN 8) VIL VIH ILI IImax CI tr tf tW LOW level input voltage HIGH level input voltage input leakage current maximum input current input capacitance pulse rise time pulse fall time pulse width scan mode 1H scan mode 2H V (PIN 7) VIL VIH ILI IImax CI tr tf tW 1996 Jul 18 LOW level input voltage HIGH level input voltage input leakage current maximum input current input capacitance pulse rise time pulse fall time pulse width 6 VI = 0 to VDD -0.3 2.0 -10 -1 - - - 1 - - - - - - - - +0.8 1 1 12 6 63 31 VI = 0 to VDD -0.3 2.0 -10 -1 - - - - - - - - - - +0.8 sync voltage amplitude video voltage amplitude (peak-to-peak value) caption data voltage amplitude source impedance input switching voltage level of sync separator input impedance input capacitance 0.1 0.7 0.25 - 1.7 2.5 - - - 0.3 1.0 0.35 - 2.0 5 - 27
1 2VDD
SAA5252
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
supply voltage total supply current
4.5 -
5.0 30
5.5 -
V mA
0.6 1.4 0.49 250 2.3 - 10 - -
V V V V k pF
IREF (PIN 24) resistor to ground voltage on pin 24 k V
V V A mA pF s s s s V V A mA pF ns ns s
VDD + 0.5 +10 +1 10 5 5
VDD + 0.5 +10 +1 10 5 5 -
Philips Semiconductors
Product specification
Line twenty-one acquisition and display (LITOD)
SAA5252
SYMBOL RGBREF (PIN, 17) VI ILI VIL VIH ZI VIL VIH ILI tr tf I2C/DC VIL VIH ILI SCL (PIN 4) VIL VIH fclk tr tf ILI CI
PARAMETER
CONDITIONS
MIN. -0.3 - - - -
TYP.
MAX.
UNIT
input voltage input leakage current VI = 0 to VDD
VDD +10
V A V V k
-10 -0.3 2.0 2.5 -0.3 2.0
R, G AND B (PINS 15, 14 AND 13); note 1 LOW level input voltage HIGH level input voltage input impedance 0.8 VDD + 0.5 - 0.8 VDD + 0.5 +10 80 80
5.0 - - - - - - - - - - - - - - -
BLANIN (PIN 9) LOW level input voltage HIGH level input voltage input leakage current input rise time input fall time (PIN 2) LOW level input voltage HIGH level input voltage input leakage current VI = 0 to VDD 0 2.0 -10 -0.3 3.0 0 between 10% and 90% between 90% and 10% VI = 0 to VDD - - -10 - 0.8 VDD +10 V V A V V kHz s s A pF VI = 0 to VDD between 10% and 90% between 90% and 10% V V A ns ns
-10 - -
LOW level input voltage HIGH level input voltage clock frequency input rise time input fall time input leakage current input capacitance
1.5 VDD + 0.5 100 2 2 +10 10
Inputs/outputs CERAMIC RESONATOR (PINS 20, 21 AND 22); see Fig.5 fosc C0 C1 L1 R1 oscillator frequency parallel capacitance series capacitance series inductance series resistance 11.82 - - - - - 1.8 VI = 0 to VDD -10 12 5.35 37.4 35.5 6 12.18 - - - 25 - 2.5 +10 MHz pF pF H nF V A
BLACK (PIN 23) Cblack Vblack ILI storage capacitor to ground black level voltage for nominal sync amplitude input leakage current 100 2.15 -
1996 Jul 18
7
Philips Semiconductors
Product specification
Line twenty-one acquisition and display (LITOD)
SAA5252
SYMBOL
PARAMETER
CONDITIONS
MIN. -0.3 3.0 - - - - - - - - - - - - - - -
TYP.
MAX.
UNIT
SDA (PIN 3; OPEN DRAIN) VIL VIH ILI CI tr tf VOL tf CL VIL VIH ILI VOL tf CL Outputs R, G AND B (PINS 15, 14 AND 13; CAPTION MODE) VOL VOH ZO CL tr tf VOL VOH CL tr tf tskew LOW level output voltage HIGH level output voltage output impedance load capacitance output rise time output fall time between 10% and 90% between 90% and 10% IOL = +2 mA IOH = -2 mA 0 V17 - 0.3 - - - - 0 1.1 - between 10% and 90% between 90% and 10% - - - - V17 - - - - - - - - - - 0.2 V17 + 0.4 200 50 10 10 V V pF ns ns LOW level input voltage HIGH level input voltage input leakage current input capacitance input rise time input fall time LOW level output voltage output fall time load capacitance between 10% and 90% between 90% and 10% IOL = 3 mA between 3 V and 1 V VI = 0 to VDD +1.5 VDD + 0.5 +10 10 2 2 0.5 200 400 V V A pF s s V ns pF
-10 - - - 0 - - -0.3 3.0
DR (PIN 5; OPEN DRAIN) LOW level input voltage HIGH level input voltage input leakage current LOW level output voltage output fall time load capacitance VI = 0 to VDD IOL = 1.6 mA +1.5 VDD + 0.5 +10 0.4 50 100 V V A V ns pF
-10 0
between 4 V and 1 V with - 3.3 k to 5 V -
BLAN (PIN 16) LOW level output voltage HIGH level output voltage load capacitance output rise time output fall time skew delay time between display and R, G, B, BLAN IOL = +2 mA IOH = -2 mA 0.4 2.8 50 10 10 10 V V pF ns ns ns
1996 Jul 18
8
Philips Semiconductors
Product specification
Line twenty-one acquisition and display (LITOD)
SAA5252
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
I2C timing (see Fig.3) tLOW tHIGH tSU;DAT tHD;DAT tSU;STO tBUF tHD;STA tSU;STA clock LOW time clock HIGH time data set-up time data hold time set-up time from clock HIGH-to-STOP START set-up time following a STOP START hold time START set-up time following clock LOW-to-HIGH transition output rise time output fall time between 10% and 90% between 90% and 10% 4 4 250 170 4 4 4 4 - - - - - - - - - - - - - - - - s s ns ns s s s s
tr tf Note
- -
- -
10 10
ns ns
1. These inputs are analog, VIL and VIH values are quoted as a guide for digital RGB users.
handbook, full pagewidth
SDA
t BUF
t LOW
tf
SCL t HIGH t SU;DAT
t HD;STA
tr
t HD;DAT
SDA
MBC764
t SU;STA
t SU;STO
Fig.3 I2C-bus timing diagram.
1996 Jul 18
9
Philips Semiconductors
Product specification
Line twenty-one acquisition and display (LITOD)
APPLICATION INFORMATION
SAA5252
100 nF
handbook, full pagewidth
CVBS C5
CVBS
2
1
24
IREF
27 k 100 nF
I C/DC
2
23
BLACK C4
5V C3 10 nF
SDA 5V 3.3 k I 2 C-bus to microcontroller
3
22
OSCGND C3 33 pF C2 33 pF
SCL
4
21
OSCIN
DR to microcontroller
5
20
OSCOUT VSS V DD
12 MHz
i.c. V
6
19
SAA5252
7 18
C7 100 nF 5V
(1)
5V
H
8
17
RGBREF C6 10 F
(1)
BLANIN
9
16
BLAN
RIN
10
15
R
GIN
11
14
G
BIN
12
13
B
MBB624 - 2
(1) Value dependent on application.
Fig.4 Application diagram.
C1
L1
R1
C0
MEA560
Fig.5 Ceramic resonator equivalent circuit.
1996 Jul 18
10
Philips Semiconductors
Product specification
Line twenty-one acquisition and display (LITOD)
DISPLAY GENERATOR General description The displayed characters are defined on a 5-by-12 matrix within a 7-by-13 window, allowing one blank pixel either side of the character and a blank pixel row above. There are a number of display options available controlled by Register 1, or external pins in `stand-alone' mode. The three display modes are video, text and caption, the device is powered up in the video mode. The display generator reads the Pre-amble Address Code (PAC) then the data associated with that row. Each character is then rounded after which it can be italicized and/or underlined, depending on the PAC or mid-row codes, before being passed on to the output circuitry. Figure 6 shows the character set. Table 1 Register map (WRITE) D7 DF1/2 CLEAR - - - D6 D5 D4 V +ve/-ve ACQ OFF - COL4 OSD4 H3 EN1 ROW3 COL3 OSD3 D3 H2 EN0 ROW2 COL2 OSD2 D2 H1 M1 ROW1 COL1 OSD1 D1
SAA5252
Display of external On-Screen Display (OSD) facilities The R, G, B and BLAN outputs of the display have the capability to be put in a 3-state mode allowing other OSD devices to take control of the television R, G, B and BLAN signals. When the BLANIN is held HIGH then the R, G, B and BLAN outputs from display are disabled and the R, G, B and BLAN signals come directly from the RGBIN and BLANIN inputs. This will allow On-Screen Display to be placed on top of the captioning without any corruption, leaving the captions intact when the On-Screen Display is switched off (BLANIN goes LOW). In this form of operation the RGBIN and RGBOUT pins can be considered transparent; BLANIN goes through the normal output buffer to BLAN.
REGISTER 00 01 02 03 04 Table 2
D0 H0 M0 ROW0 COL0 OSD0
RGB, BLAN H +ve/-ve +ve/-ve CH 2/1 - - OSD6 NARROW/ WIDE - - OSD5
Register map (READ) D7 POR PARITY ERROR PARITY ERROR 0 DATA BIT 7 DATA BIT 7 D6 0 DATA BIT 6 DATA BIT 6 D5 0 DATA BIT 5 DATA BIT 5 D4 D3 F1/F2 DATA BIT 4 DATA BIT 4 D2 EDS DATA BIT 3 DATA BIT 3 D1 PARITY SHUTDOWN DATA BIT 2 DATA BIT 2 D0 DATA READY DATA BIT 1 DATA BIT 1
REGISTER 80 81 82
1996 Jul 18
11
Philips Semiconductors
Product specification
Line twenty-one acquisition and display (LITOD)
SAA5252
b6 b 5 b4 r o w 0 0 0 0 column
0 0 0 0
0 0 1 1
0 1 0 2
0 1 1 3
1 0 0 4
1 0 1 5
1 1 0 6
1 1 1 7
b 3 b 2 b 1 b0
0
white
signifies "flash on" command
0
0
0
1
1
white underline
signifies a transparent space
0
0
1
0
2
green
0
0
1
1
3
green underline
0
1
0
0
4
blue
0
1
0
1
5
blue underline
0
1
1
0
6
cyan
0
1
1
1
7
cyan underline
1
0
0
0
8
red
1
0
0
1
9
red underline
1
0
1
0
A
yellow
1
0
1
1
B
yellow underline
1
1
0
0
C
magenta
1
1
0
1
D
magenta underline
1
1
1
0
E
italics
1
1
1
1
F
italics underline
MBB625 - 2
The `0' and `zero' use the same character, 4FH.
Fig.6 Character set.
1996 Jul 18
12
Philips Semiconductors
Product specification
Line twenty-one acquisition and display (LITOD)
I2C INTERFACE Description of WRITE registers
SAA5252
The write subaddresses auto increment from 0 through to 4 at which point they stay until a new write subaddress is sent. Registers are set to all logic 0 at power-up. Table 3 BIT D0 to D3 D4 D5 D6 D7 Table 4 BIT D0, D1 D2, D3 D4 D5 D6 D7 Table 5 BIT D0 to D3 Register 0 WRITE (Control Byte 1) DESCRIPTION H0 to H3 set the offset position from the start of the horizontal sync pulse, set to a nominal value on reset. Vertical sync pulse expected to be negative going logic 0 or positive-going logic 1. Horizontal sync pulse expected to be negative going logic 0 or positive-going logic 1. Video outputs will be positive going logic 0 or negative-going logic 1. Data field select. When set to logic 0 Field 1 is decoded, when set to logic 1 Field 2 is decoded. Register 1 WRITE (Control Byte 2) DESCRIPTION Display mode selection bits. Table 8 shows the possible display modes. Enhanced caption mode selection bits. Table 9 shows the possible enhanced caption modes. When set to logic 1 acquisition of caption data is inhibited to allow the display to be used for On-Screen Display purposes. Acquisition window selection. When set to logic 0 only Line 21 is checked for caption data. When set to logic 1, lines 19 to 23 of both fields are checked, allowing encrypted video signals to be handled. User channel selection. Clears the page memory when set HIGH. The page memory will be within two fields (30 ms). Register 2 WRITE (On-Screen Display data row address) DESCRIPTION Row 0 to 3 sets the row address for On-Screen Display. This stored value will be incremented by overflow increments of Register 3. Register 3 WRITE (On-Screen Display data column address) DESCRIPTION Columns 0 to 4 sets the column address for On-Screen Display. This stored value will be incremented by writes to Register 4. Register 4 WRITE (On-Screen Display data) DESCRIPTION OSD0 to OSD6, On-Screen Display data bits writing to this register causes Register 3 to increment its stored value.
Table 6 BIT D0 to D4
Table 7 BIT D0 to D6
1996 Jul 18
13
Philips Semiconductors
Product specification
Line twenty-one acquisition and display (LITOD)
Table 8 Display modes DISPLAY MODE OPTIONS Video only Text mode Normal caption mode Enhanced caption mode Table 9 Enhanced caption modes ENHANCED CAPTION MODES Enhanced caption modes Shadowed character/Video background Shadowed character/Mesh background Normal character/Video background Normal character/Mesh background Description of READ registers EN1 EN1 0 0 1 1 M1 0 0 1 1
SAA5252
M0 0 1 0 1
EN0 EN0 0 1 0 1
The read subaddresses auto increment from 80H through to 82H at which point they stay until a new read subaddress is sent. All the bits in Table 10 are reset to logic 0 after the register is read. Table 10 Register 80H READ (status) BIT D0 D1 D2 D3 D7 Data ready (new data has been acquired). Parity error shut-down, goes HIGH when SAA5252 has a parity shut-down condition. Indicates the following bytes are extended data service bytes. Indicates Field 1 or Field 2 data bytes. Indicates Power-On Reset (POR) has occurred, all I2C-bus write registers have been reset to logic 0. DESCRIPTION
Table 11 Register 81H READ (first data byte) BIT D0 to D6 D7 Note 1. In the Line 21, specification data bits are numbered D1 to D8. Table 12 Register 82H READ (second data byte) BIT D0 to D6 D7 Note 1. In the Line 21, specification data bits are numbered D1 to D8. 1996 Jul 18 14 Data Bit 1 to Data Bit 7 (see note 1). Parity error flag bit. Bit goes HIGH when a parity error has occurred. DESCRIPTION Data Bit 1 to Data Bit 7 (see note 1). Parity error flag bit. Bit goes HIGH when a parity error has occurred. DESCRIPTION
Philips Semiconductors
Product specification
Line twenty-one acquisition and display (LITOD)
Interface to microcontroller using I2C-bus The interface to the microcontroller is via the two-wire serial I2C-bus, and optionally by a Data-Ready signal (DR). On power up the microcontroller initializes the device by an I2C-bus WRITE to Registers 0 (Control Byte 1). The I2C-bus subaddress is then auto incremented to point to Register 1 (Control Byte 2). These two registers configure the device to the users requirements. If the device is to be used for data acquisition only, then there are three methods by which the microcontroller can be informed of the arrival of valid Line 21 data: * It can poll the DR pin, if the function has been enabled, and wait for it to go LOW. * It can use the negative edge of the DR signal to cause an interrupt. * It can poll the Data Ready bit (bit D0 of the status byte, I2C-bus READ Register 0). When valid data is detected, the microcontroller must initiate an I2C-bus READ of Registers 80H, 81H and 82H. The first and second data bytes from the most recently received Line 21 are in Register 81H and Register 82H respectively. The DR pin, and the Data Ready bit (Status bit D0) will be cleared after any register has been read. POR is reset after Register 80H has been read.
SAA5252
`STAND-ALONE' (NON I2C-BUS) OPERATION To set the SAA5252 for `stand-alone' operation pin 2 (I2C/DC) is tied LOW. This will change the operation of the SCL, SDA and DR pins to mode select inputs which will select as shown in Table 13. In the caption mode the SAA5252 operates in the basic Normal character/Black background mode. This complies with the FCC ruling. In the Enhanced caption mode the set-up will be Shadowed character/Video background. SDA and SCL in the `stand-alone' operation act as bits M0 and M1 in Table 8. Table 13 Stand-alone modes DR 0 0 0 0 1 1 1 1 SCL SDA 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 MODE OF OPERATION video mode text mode normal captions video mode text mode normal captions CHANNEL RECEPTION Channel 1 Channel 1 Channel 1 Channel 2 Channel 2 Channel 2
enhanced captions Channel 1
enhanced captions Channel 2
1996 Jul 18
15
Philips Semiconductors
Product specification
Line twenty-one acquisition and display (LITOD)
PACKAGE OUTLINES DIP24: plastic dual in-line package; 24 leads (600 mil)
SAA5252
SOT101-1
seating plane
D
ME
A2
A
L
A1 c Z e b1 b 24 13 MH wM (e 1)
pin 1 index E
1
12
0
5 scale
10 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches A max. 5.1 0.20 A1 min. 0.51 0.020 A2 max. 4.0 0.16 b 1.7 1.3 0.066 0.051 b1 0.53 0.38 0.021 0.015 c 0.32 0.23 0.013 0.009 D (1) 32.0 31.4 1.26 1.24 E (1) 14.1 13.7 0.56 0.54 e 2.54 0.10 e1 15.24 0.60 L 3.9 3.4 0.15 0.13 ME 15.80 15.24 0.62 0.60 MH 17.15 15.90 0.68 0.63 w 0.25 0.01 Z (1) max. 2.2 0.087
Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT101-1 REFERENCES IEC 051G02 JEDEC MO-015AD EIAJ EUROPEAN PROJECTION
ISSUE DATE 92-11-17 95-01-23
1996 Jul 18
16
Philips Semiconductors
Product specification
Line twenty-one acquisition and display (LITOD)
SAA5252
SO24: plastic small outline package; 24 leads; body width 7.5 mm
SOT137-1
D
E
A X
c y HE vMA
Z 24 13
Q A2 A1 pin 1 index Lp L 1 e bp 12 wM detail X (A 3) A
0
5 scale
10 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches A max. 2.65 0.10 A1 0.30 0.10 A2 2.45 2.25 A3 0.25 0.01 bp 0.49 0.36 c 0.32 0.23 D (1) 15.6 15.2 0.61 0.60 E (1) 7.6 7.4 0.30 0.29 e 1.27 0.050 HE 10.65 10.00 0.42 0.39 L 1.4 0.055 Lp 1.1 0.4 0.043 0.016 Q 1.1 1.0 0.043 0.039 v 0.25 0.01 w 0.25 0.01 y 0.1 0.004 Z
(1)
0.9 0.4 0.035 0.016
0.012 0.096 0.004 0.089
0.019 0.013 0.014 0.009
8 0o
o
Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION SOT137-1 REFERENCES IEC 075E05 JEDEC MS-013AD EIAJ EUROPEAN PROJECTION
ISSUE DATE 92-11-17 95-01-24
1996 Jul 18
17
Philips Semiconductors
Product specification
Line twenty-one acquisition and display (LITOD)
SOLDERING Introduction There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these situations reflow soldering is often used. This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our "IC Package Databook" (order code 9398 652 90011). DIP SOLDERING BY DIPPING OR BY WAVE The maximum permissible temperature of the solder is 260 C; solder at this temperature must not be in contact with the joint for more than 5 seconds. The total contact time of successive solder waves must not exceed 5 seconds. The device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified maximum storage temperature (Tstg max). If the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit. REPAIRING SOLDERED JOINTS Apply a low voltage soldering iron (less than 24 V) to the lead(s) of the package, below the seating plane or not more than 2 mm above it. If the temperature of the soldering iron bit is less than 300 C it may remain in contact for up to 10 seconds. If the bit temperature is between 300 and 400 C, contact may be up to 5 seconds. SO REFLOW SOLDERING Reflow soldering techniques are suitable for all SO packages. Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement.
SAA5252
Several techniques exist for reflowing; for example, thermal conduction by heated belt. Dwell times vary between 50 and 300 seconds depending on heating method. Typical reflow temperatures range from 215 to 250 C. Preheating is necessary to dry the paste and evaporate the binding agent. Preheating duration: 45 minutes at 45 C. WAVE SOLDERING Wave soldering techniques can be used for all SO packages if the following conditions are observed: * A double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used. * The longitudinal axis of the package footprint must be parallel to the solder flow. * The package footprint must incorporate solder thieves at the downstream end. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Maximum permissible solder temperature is 260 C, and maximum duration of package immersion in solder is 10 seconds, if cooled to less than 150 C within 6 seconds. Typical dwell time is 4 seconds at 250 C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. REPAIRING SOLDERED JOINTS Fix the component by first soldering two diagonallyopposite end leads. Use only a low voltage soldering iron (less than 24 V) applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 C.
1996 Jul 18
18
Philips Semiconductors
Product specification
Line twenty-one acquisition and display (LITOD)
DEFINITIONS Data sheet status Objective specification Preliminary specification Product specification Limiting values
SAA5252
This data sheet contains target or goal specifications for product development. This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains final product specifications.
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. PURCHASE OF PHILIPS I2C COMPONENTS
Purchase of Philips I2C components conveys a license under the Philips' I2C patent to use the components in the I2C system provided the system conforms to the I2C specification defined by Philips. This specification can be ordered using the code 9398 393 40011.
1996 Jul 18
19
Philips Semiconductors - a worldwide company
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For all other countries apply to: Philips Semiconductors, Marketing & Sales Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825 (c) Philips Electronics N.V. 1996
Internet: http://www.semiconductors.philips.com/ps/ (1) SAA5252_4 June 26, 1996 11:51 am SCA50
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands
537021/01/04/pp20 Date of release: 1996 Jul 18 Document order number: 9397 750 00975

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